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Topics

The PATMOS objective is to provide a forum to discuss and investigate emerging challenges in methodologies and tools for the design of upcoming generations of integrated circuits and systems, including reconfigurable hardware such as FPGA's. The technical program will focus on timing, performance and power consumption as well as architectural aspects with particular emphasis on modelling, design, characterization, analysis and optimization. The emphasis of the workshop is on, but not limited to, the following topics:

  • Reliability and Technology Variations
    • Modeling and simulation in the presence of on-chip variability;
    • Variation-aware circuit design;
    • Reliability issues in nanoscale circuits;
    • Soft errors and radiation hardening;
    • Fault tolerance and dependability;
    • Resilient circuits;
    • Design solutions for self adaptive circuits and systems;
    • PVTA sensors;
    • Redundant designs and applications;
  • Low Power and Thermal-aware Design
    • Design techniques for low power circuits and systems at all levels of abstraction;
    • Methods and tools for analysis and characterization of power consumption;
    • Power Estimation and Optimization;
    • Low power Architectures and System Level Techniques;
    • Power and thermal sensors;
    • Power-aware architectures: wireless sensor networks, green computing, ultra low-power embedded systems;
    • Special power related topics, e.g. low voltage, leakage power, power grid, interconnect power, clock tree power, power aware test pattern generation, power-aware synthesis, compilation and floorplanning;
    • Thermal-aware circuit and system design;
    • Polices for thermal optimization;
    • Hardware-software interaction for temperature minimization;
    • Thermal models and temperature estimation;
    • Temperature-driven reliability issues;
  • Timing and Performance
    • Methodologies and tools for the analysis, design and verification of timing and performance properties of integrated circuits and systems at all levels of abstraction;
    • Variability and statistical timing analysis;
    • Design for yield, design for manufacturability;
    • Simulation tools;
    • Design and issues concerning asynchronous and GALS systems;
    • Special timing or performance related topics, e.g. crosstalk, synchronization, side-channel attacks.
  • Power, Reliability and Timing Issues Addressing Specific Technologies
    • Reconfigurable Architectures;
    • Caches and Memory Devices;
    • Emerging Memory Technologies, e.g. Phase Change Memories.
  • Design Experience and Case Studies
    • Examples, test cases, benchmarks or design studies which present innovative solutions for timing, performance or power consumption related design challenges.